MT312 Zarlink Semiconductor, MT312 Datasheet - Page 51

• Manufacturer Part Number: MT312
• Description: Satellite Channel Decoder
• Manufacturer: Zarlink Semiconductor

8.2
8.2.1
bit-7:
bit-6:
bit-5:
bit-4:
bit-3:
bit-2:
bit-1:
bit-0:
Reading an Interrupt register resets that register.
8.2.2
bit-7:
bit-6-4:
bit-3:
bit-2:
bit-1:
bit-0:
FEC_INT
FEC_STATUS
NAME
NAME
Forward Error Correction Read Registers
FEC interrupt register 3 (R)
FEC status register 6 (R)
High = DiSEqC™ event, see “DISEQC instruction register 36 (R/W)” on page 34
High = Byte align lock lost
High = Byte align lock - important indicator.
High = Viterbi lock lost
High = Viterbi lock
High = Viterbi BER monitor period reached
High = De-scrambler lock lost
High = De-scrambler lock
Reserved
Viterbi coding rate
High = De-scrambler lock
High = Byte align lock
High = Viterbi lock
Reserved
ADR
03
ADR
06
bit-7
bit 6
bit-7
0
0
0
0
1
1
bit-6
bit-6
Table 5 - Viterbi Code Rate Indication
FEC_INT[7:0] Interrupt FEC
bit-5
bit5
0
0
1
1
0
0
bit-5
bit-4
Zarlink Semiconductor Inc.
FEC_STATUS[7:0]
bit 4
0
1
0
1
0
1
bit-4
MT312
bit-3
51
bits 6-4
bit-3
0
1
2
3
4
5
bit-2
bit-2
Code rate indication
bit-1
bit-1
bit-0
1/2
2/3
3/4
5/6
6/7
7/8
bit-0
R
hex
Def
R
00
hex
Def
00
Design Manual