MT312 Zarlink Semiconductor, MT312 Datasheet - Page 76

• Manufacturer Part Number: MT312
• Description: Satellite Channel Decoder
• Manufacturer: Zarlink Semiconductor

11.3
Writing to these registers will have no effect.
11.4
11.4.1
TEST R (107)
TEST R[7:0]
12.0
12.1
The 2-wire bus Address is determined by applying VDD or VSS to the ADDR[7:1] pins. See Primary 2-wire Bus
Interface.
12.2
RADD is the 2-wire register address. It is the first byte written after the MT312 2-wire chip address when in write
mode.
To write to the chip, the microprocessor should send a START condition and the chip address with the write bit set,
followed by the register address where subsequent data bytes are to be written. Finally, when the 'message' has
been sent, a STOP condition is sent to free the bus.
To read from the chip from register address zero, the microprocessor should send a START condition and the chip
address with the read bit set, followed by the requisite number of CLK1 clocks to read the bytes out. Finally a STOP
condition is sent to free the bus. RADD is not sent in this case.
To read from the chip from an address other than zero, the microprocessor should send the chip address with the
write bit set, followed by the register address where subsequent data bytes are to be read. Then the
microprocessor should send a START condition and the chip address with the read bit set, followed by the requisite
number of CLK1 clocks to read the bytes out. Finally a STOP condition is sent to free the bus. A STOP condition
resets the RADD value to 00. For examples of use, see “Examples of 2-wire Bus Messages” on page 78.
RADD (virtual register, address none)
bit-7:
bit-6-0:
TEST R
NAME
RADD
NAME
Read only Secondary Register Map
Secondary Registers for Test and De-Bugging Read Register
Primary 2-wire Bus Address
RADD: 2-wire Register Address (W)
Microprocessor Control
Test Read register 107 (R)
ADR
N/A
ADR
107
bit-7
IAI
bit-7
IAI
AD[6:0]
TEST R[7:0] Test Read, for test purposes only.
bit-6
AD6
bit-6
bit-5
AD5
bit-5
Default value
For test purposes only.
bit-4
AD4
bit-4
Zarlink Semiconductor Inc.
bit-3
AD3
bit-3
MT312
0 dec.
High = Inhibit auto increment.
Low = Increment addresses.
2-wire register address, numbers in the range 0 to 127 are
allowed.
76
bit-2
AD2
bit-2
bit-1
AD1
bit-1
00 hex.
bit-0
AD0
bit-0
W
R
hex
Def
hex
Def
00
-
Design Manual