r4f2426 Renesas Electronics Corporation., r4f2426 Datasheet - Page 204

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r4f2426

Manufacturer Part Number
r4f2426
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Section 6 Bus Controller (BSC)
Note:
Rev. 1.00 Sep. 19, 2008 Page 176 of 1270
REJ09B0466-0100
Bit
10
9
8
7 to 4 
3
2
1
0
Bit Name
RCD1
RCD0
CKSPE*
RDXC1*
RDXC0*
*
Not supported by the H8S/2426 Group and H8S/2424 Group.
Initial Value
0
0
0
All 0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reserved
Clock Suspend Enable
Reserved
Description
This bit can be read from or written to. However,
the write value should always be 0.
RAS-CAS Wait Control
These bits select a wait cycle to be inserted
between the RAS assert cycle and CAS assert
cycle. A 1- to 4-state wait cycle can be inserted.
00: Wait cycle not inserted
01: 1-state wait cycle inserted
10: 2-state wait cycle inserted
11: 3-state wait cycle inserted
Reserved
These bits can be read from or written to.
However, the write value should always be 0.
Enables clock suspend mode for extend read data
during DMAC and EXDMAC single address
transfer with the synchronous DRAM interface.
0: Disables clock suspend mode
1: Enables clock suspend mode
This bit can be read from or written to. However,
the write value should always be 0.
Read Data Extension Cycle Number Selection
Selects the number of read data extension cycle
(Tsp) insertion state in clock suspend mode.
These bits are valid when the CKSPE bit is set to
1.
00: Inserts 1 state
01: Inserts 2 state
10: Inserts 3 state
11: Inserts 4 state

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