r4f2426 Renesas Electronics Corporation., r4f2426 Datasheet - Page 991

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r4f2426

Manufacturer Part Number
r4f2426
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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17.3.2
ADCSR_0 controls A/D conversion operations.
Bit
7
6
5
4
Bit Name
ADF
ADIE
ADST
EXCKS
A/D Control/Status Register for Unit 0 (ADCSR_0)
Initial
Value
0
0
0
0
R/W
R/(W)* A/D End Flag
R/W
R/W
R/W
Description
A status flag that indicates the end of A/D conversion.
[Setting conditions]
[Clearing conditions]
A/D Interrupt Enable
Setting this bit to 1 enables ADI interrupts by ADF.
A/D Start
Clearing this bit to 0 stops A/D conversion, and the A/D
converter enters wait state.
Setting this bit to 1 starts A/D conversion. In single mode,
this bit is cleared to 0 automatically when A/D conversion
on the specified channel ends. In scan mode, A/D
conversion continues sequentially on the specified
channels until this bit is cleared to 0 by software, a reset,
or hardware standby mode. While the ADSTCLR bit in
ADCR is set to 1, the ADST bit is cleared to 0
automatically when A/D conversion on all selected
channels ends, and then A/D conversion stops.
The timing to clear the ADST bit automatically differs from
that of ADF setting; the ADST bit is cleared before the
ADF bit is set.
Clock Extension Select
Specifies the A/D conversion time in combination with the
CKS1 and CKS0 bits in ADCR. Be sure to set these three
bits at one time. For details, see the description of the
ADCR resisters.
Completion of A/D conversion in single mode
Completion of A/D conversion on all specified
channels in scan mode
Writing of 0 after reading ADF = 1
Reading from ADDR after activation of the DMAC or
DTC by an ADI interrupt
Rev. 1.00 Sep. 19, 2008 Page 963 of 1270
Section 17 A/D Converter
REJ09B0466-0100

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