r4f2426 Renesas Electronics Corporation., r4f2426 Datasheet - Page 976

• Manufacturer Part Number: r4f2426
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
• Manufacturer: Renesas Electronics Corporation.

Section 16 I
Rev. 1.00 Sep. 19, 2008 Page 948 of 1270
REJ09B0466-0100
No
2
C Bus Interface 2 (IIC2)
No
No
Write transmit data in ICDRT
Write transmit data in ICDRT
No
No
No
Read ACKBR in ICIER
Set MST = 0 and TRS
Read BBSY in ICCRB
Set MST = 1 and TRS
Read TDRE in ICSR
Read TEND in ICSR
Clear TEND in ICSR
Clear STOP in ICSR
Read STOP in ICSR
Clear TDRE in ICSR
Read TEND in ICSR
Write transmit data
Write BBSY = 1
Write BBSY = 0
= 0 in ICCRA
= 1 in ICCRA.
Figure 16.14 Sample Flowchart for Master Transmit Mode
and SCP = 0.
and SCP = 0
ACKBR=0 ?
Final byte?
BBSY=0 ?
TEND=1 ?
TDRE=1 ?
TEND=1 ?
STOP=1 ?
in ICDRT
Transmit
Initialize
mode?
Start
End
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
[14]
[15]
Master receive mode
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10] Wait for the completion of transmission for the final byte.
[11] Clear TEND flag.
[12] Clear STOP flag.
[13] Stop condition issuance.
[14] Wait for the generation of the stop condition.
[15] Set slave receive mode. Clear TDRE.
Test the status of the SCL and SDA lines.
Select master transmit mode.
Start condition issuance.
Select transmit data for the first byte (slave address + R/W).
Wait for 1 byte to be transmitted.
Test the acknowledge bit, transferred from the specified slave device.
Set transmit data for the second and subsequent data (except for the final byte).
Wait for ICDRT empty.
Set the final byte of transmit data.