r4f2426 Renesas Electronics Corporation., r4f2426 Datasheet - Page 872

• Manufacturer Part Number: r4f2426
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
• Manufacturer: Renesas Electronics Corporation.

Section 15 Serial Communication Interface (SCI, IrDA)
Rev. 1.00 Sep. 19, 2008 Page 844 of 1270
REJ09B0466-0100
Bit
3
2
1
0
Bit Name
BCP1
BCP0
CKS1
CKS0
Initial Value
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
Basic Clock Pulse 1 and 0
These bits, in combination with the BCP2 bit in
SCMR, select the number of basic clock cycles in
a 1-bit transfer interval in Smart Card interface
mode.
BCP2 to BCP0 Settings:
000: 93 clock cycles (S = 93)
001: 128 clock cycles (S = 128)
010: 186 clock cycles (S = 186)
011: 512 clock cycles (S = 512)
100: 32 clock cycles (S = 32) (initial value)
101: 64 clock cycles (S = 64)
110: 372 clock cycles (S = 372)
111: 256 clock cycles (S = 256)
For details, refer to section 15.7.4, Receive Data
Sampling Timing and Reception Margin. S stands
for the value of S in BRR (see section 15.3.9, Bit
Rate Register (BRR)).
Clock Select 1 and 0
These bits select the clock source for the on-chip
baud rate generator.
00: φ clock (n = 0)
01: φ/4 clock (n = 1)
10: φ/16 clock (n = 2)
11: φ/64 clock (n = 3)
For the relation between the bit rate register
setting and the baud rate, see section 15.3.9, Bit
Rate Register (BRR). n is the decimal display of
the value of n in BRR (see section 15.3.9, Bit Rate
Register (BRR)).