mfr4300 Freescale Semiconductor, Inc, mfr4300 Datasheet - Page 128

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mfr4300

Manufacturer Part Number
mfr4300
Description
Flexray Communication Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
FlexRay Module (FLEXRAYV2)
3.3.2.63.30 Protocol Configuration Register 29 (PCR29)
3.3.2.63.31 Protocol Configuration Register 30 (PCR30)
3.3.2.64
The content of these registers comprises message buffer configuration data, message buffer control data,
message buffer status information, and message buffer interrupt flags.
128
0x00DA
0x00DC
Module Base + 0x0100, 0x0108,..., 0x04F8
Reset
Reset
Reset
W
W
W
Field
MCM
MBT
MTD
R
R
R
14
13
12
15
15
15
0
0
0
0
0
extern_offset_
correction
Figure 3-93. Message Buffer Configuration, Control, Status Registers (MBCCSRn)
Message Buffer Commit Mode — This bit applies only to double buffered transmit message buffers and defines
the commit mode.
0 Streaming commit mode
1 Immediate commit mode
Message Buffer Type — This bit applies only to transmit message buffers and defines the buffering type.
0 Single buffered transmit message buffer
1 Double buffered transmit message buffer
Message Buffer Transfer Direction — This bit defines the transfer direction of the message buffer.
0 Receive message buffer
1 Transmit message buffer
MCM
Message Buffer Configuration, Control, Status Registers (MBCCSRn)
14
14
14
0
0
0
0
MBT
13
13
13
0
0
0
0
Figure 3-91. Protocol Configuration Register 29 (PCR29)
Figure 3-92.
Additional Reset: CMT, DUP, DVAL, MBIF: Message Buffer Disable
MTD
Table 3-75. MBCCSRn Field Descriptions (Sheet 1 of 3)
12
12
12
0
0
0
0
CMT
11
11
11
0
0
0
0
Protocol Configuration Register 30 (PCR30)
EDT LCKT
10
10
10
Message Buffer Configuration
0
0
0
0
0
MFR4300 Data Sheet, Rev. 3
0
0
0
0
0
9
9
9
MBIE
0
0
0
0
8
8
8
Description
0
0
0
0
0
7
7
7
minislots_max
6
0
6
0
0
6
0
0
Write: MCM, MBT, MTD:
Write: EDT, LCKT, MBIE, MBIF: Normal Mode
0
0
0
0
0
5
5
5
DUP DVAL
0
0
0
0
4
4
4
0
0
0
3
3
3
Freescale Semiconductor
POC:config
sync_node_max
Write: CMT: MB_LCK
EDS LCKS
0
0
0
2
2
2
Write:
Write:
POC:config
POC:config
1
0
1
0
1
0
or MB_DIS
MBIF
0
0
0
0
0
0

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