mfr4300 Freescale Semiconductor, Inc, mfr4300 Datasheet - Page 225

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mfr4300

Manufacturer Part Number
mfr4300
Description
Flexray Communication Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
6.4.1.2
When the low voltage reset or clock monitor failure signal is asserted the CRG asserts the system reset
signal. The CRG will deassert synchronously the system reset signal approximately 16420
EXTAL/CLK_CC clock periods after the deassertion of the low voltage reset or clock monitor failure
signal.
The CRG asserts the INT_CC# interrupt line and the low voltage reset interrupt flag, CRSR.LVIF, on the
rising edge of the low voltage reset signal. The CRG asserts the INT_CC# interrupt line and the clock
monitor failure interrupt flag, CRSR.CMIF, on the rising edge of the clock monitor failure signal.
Figure 6-4
monitor failure signal occur.
Freescale Semiconductor
and
Low Voltage and Clock Monitor Reset
power-on reset
The CRG deasserts the INT_CC# signal when CRSR.PRIF, CRSR.LVIF,
CRSR.CMIF and CRSR.ERIF bits are “0“.
Figure 6-5
system reset
CRSR.PRIF
INT_CC#
VDD
show the operations performed by the CRG when a low voltage reset or a clock
Figure 6-3. CRG Power On Reset
MFR4300 Data Sheet, Rev. 3
~16420 EXTAL/CLK_CC periods
NOTE
Clocks and Reset Generator (CRG)
225

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