mfr4300 Freescale Semiconductor, Inc, mfr4300 Datasheet - Page 137

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mfr4300

Manufacturer Part Number
mfr4300
Description
Flexray Communication Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
A receive FIFO consists of a set of physical message buffers in the FRM and a set of receive FIFO control
registers located in dedicated registers. The structure of a receive FIFO is given in
The connection between the receive FIFO control registers and the set of physical message buffers is
established by the start index field SIDX in the
depth field FIFO_DEPTH in the
RDIDX
(RFBRIR). The start address SADR_MBHF_1 of the first message buffer header field that belongs to the
receive FIFO in the FRM is determined according to
The start address SADR_MBHF_n of the last message buffer header field that belongs to the receive FIFO
in the FRM is determined according to
Freescale Semiconductor
Receive FIFO A Read Index Register (RFARIR)
All message buffer header fields assigned to a receive FIFO must be a
contiguous region.
SADR_MBHF_n = ((RFSIR.SIDX+RFDSR.FIFO_DEPTH) * 10) + 0x800
SADR_MBHF_1 = (RFSIR.SIDX * 10) + 0x800
Receive FIFO Depth and Size Register
Equation
MFR4300 Data Sheet, Rev. 3
Receive FIFO Start Index Register
3-5.
NOTE
Equation
/
Receive FIFO B Read Index Register
3-4.
(RFDSR), and the read index field
FlexRay Module (FLEXRAYV2)
Figure
(RFSIR), the FIFO
3-100.
Eqn. 3-4
Eqn. 3-5
137

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