mfr4300 Freescale Semiconductor, Inc, mfr4300 Datasheet - Page 189

• Manufacturer Part Number: mfr4300
• Description: Flexray Communication Controllers
• Manufacturer: Freescale Semiconductor, Inc

If the sync frame table generation is disabled, the table valid bits SFTCCSR.EVAL and SFTCCSR.EVAL
are reset when the counter values in the
because the tables stored in the FRM are no longer related to the values in the
(SFCNTR).
3.4.12.5
The sync frame tables will be transferred into the FRM during the table write windows shown in
Figure
application locks the table outside of the table write window, the lock is granted immediately.
3.4.12.5.1
The application locks the even/odd sync frame table by writing ‘1’ to the lock trigger bit ELKT/OLKT in
the
currently written to the FRM, the lock is granted immediately, and the lock status bit ELKS/OLKS is set.
If the affected table is currently written to the FRM, the lock is not granted. In this case, the application
must issue the lock request again until the lock is granted.
The application unlocks the even/odd sync frame table by writing ‘1’ to the lock trigger bit ELKT/OLKT.
The lock status bit ELKS/OLKS is cleared immediately.
3.4.13
The FlexRay module provides a flexible means to request the transmission of the Media Access Test
Symbol MTS in the symbol window on channel A or channel B.
The application can configure the set of communication cycles in which the MTS will be transmitted over
the FlexRay bus by programming the CYCCNTMSK and CYCCNTVAL fields in the
Configuration Register (MTSACFR)
The application enables or disables the generation of the MTS on either channel by setting or clearing the
MTE control bit in the
(MTSBCFR). If an MTS is to be transmitted in a certain communication cycle, the application must set
the MTE control bit during the static segment of the preceding communication cycle.
The MTS is transmitted over channel A in the communication cycle with number CCN, if
Equation
Freescale Semiconductor
Sync Frame Table Configuration, Control, Status Register
3-136. During the table write, the application can not lock the table that is currently written. If the
3-17, and
static segment
MTS Generation
Sync Frame Table Access
Sync Frame Table Locking and Unlocking
SFTCCSR.[OPT,SIDEN,SDVEN] write window
cycle 2n-1
Equation 3-17
Figure 3-136. Sync Frame Table Trigger and Generation Timing
MTS A Configuration Register (MTSACFR)
PSR0.PROTSTATE = NORMAL_ACTIVE
NIT
are fulfilled.
and
MTSACFR.MTE = 1
Sync Frame Counter Register (SFCNTR)
MFR4300 Data Sheet, Rev. 3
static segment
MTS B Configuration Register
cycle 2n
(SFTCCSR). If the affected table is not
NIT
even table write
or
static segment
MTS B Configuration Register
(MTSBCFR).
Sync Frame Counter Register
cycle 2n+1
are updated. This is done
FlexRay Module (FLEXRAYV2)
odd table write
MTS A
Equation
NIT
Eqn. 3-15
Eqn. 3-16
3-16,
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