mfr4300 Freescale Semiconductor, Inc, mfr4300 Datasheet - Page 14

• Manufacturer Part Number: mfr4300
• Description: Flexray Communication Controllers
• Manufacturer: Freescale Semiconductor, Inc

Figure Number
Figure 3-22.
Figure 3-23.
Figure 3-24.
Figure 3-25.
Figure 3-26.
Figure 3-27.
Figure 3-28.
Figure 3-29.
Figure 3-30.
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Figure 3-33.
Figure 3-34.
Figure 3-35.
Figure 3-36.
Figure 3-37.
Figure 3-38.
Figure 3-39.
Figure 3-40.
Figure 3-41.
Figure 3-42.
Figure 3-43.
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Figure 3-47.
Figure 3-48.
Figure 3-49.
Figure 3-50.
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Figure 3-52.
Figure 3-53.
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Figure 3-56.
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Macrotick Counter Register (MTCTR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Cycle Counter Register (CYCTR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Slot Counter Channel A Register (SLTCTAR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Slot Counter Channel B Register (SLTCTBR). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Rate Correction Value Register (RTCORVR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Offset Correction Value Register (OFCORVR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Combined Interrupt Flag Register (CIFRR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Sync Frame Counter Register (SFCNTR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Sync Frame Table Offset Register (SFTOR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Sync Frame Table Configuration, Control, Status Register (SFTCCSR). . . . . . . . . . . . . 99
Sync Frame ID Rejection Filter Register (SFIDRFR) . . . . . . . . . . . . . . . . . . . . . . . . . . 100
Sync Frame ID Acceptance Filter Value Register (SFIDAFVR). . . . . . . . . . . . . . . . . . 101
Sync Frame ID Acceptance Filter Mask Register (SFIDAFMR). . . . . . . . . . . . . . . . . . 101
Network Management Vector Registers (NMVR0–NMVR5) . . . . . . . . . . . . . . . . . . . . 101
Network Management Vector Length Register (NMVLR) . . . . . . . . . . . . . . . . . . . . . . 102
Timer Configuration and Control Register (TICCR) . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Timer 1 Cycle Set Register (TI1CYSR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Timer 1 Macrotick Offset Register (TI1MTOR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Timer 2 Configuration Register 0 (TI2CR0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
Timer 2 Configuration Register 1 (TI2CR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Slot Status Selection Register (SSSR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Slot Status Counter Condition Register (SSCCR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Slot Status Registers (SSR0–SSR7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Slow Status Counter Registers (SSCR0–SSCR3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
MTS A Configuration Register (MTSACFR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
MTS B Configuration Register (MTSBCFR). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Receive Shadow Buffer Index Register (RSBIR). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Receive FIFO Selection Register (RFSR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Receive FIFO Start Index Register (RFSIR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Receive FIFO Depth and Size Register (RFDSR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
Receive FIFO A Read Index Register (RFARIR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
Receive FIFO B Read Index Register (RFBRIR). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Receive FIFO Message ID Acceptance Filter Value Register (RFMIDAFVR). . . . . . . 115
Receive FIFO Message ID Acceptance Filter Mask Register (RFMIAFMR) . . . . . . . . 116
Receive FIFO Frame ID Rejection Filter Value Register (RFFIDRFVR) . . . . . . . . . . . 116
MFR4300 Data Sheet, Rev. 3
Title
Freescale Semiconductor
Page