mfr4300 Freescale Semiconductor, Inc, mfr4300 Datasheet - Page 150

• Manufacturer Part Number: mfr4300
• Description: Flexray Communication Controllers
• Manufacturer: Freescale Semiconductor, Inc

FlexRay Module (FLEXRAYV2)
The message buffer data field is located in the FRM; thus, the FlexRay module has no means to control
application write access to the field. To ensure data consistency, the application must follow a write and
read access scheme.
3.4.5.3.1
For transmit message buffers, the FlexRay module will not modify the content of the Message Buffer Data
Field. Thus the application can read back the data at any time without any impact on data consistency.
For receive message buffers the application must lock the related receive message buffer and retrieve the
message buffer header index from the
buffer is locked, the FlexRay module will not update the Message Buffer Data Field.
For receive FIFOs, the application can read the message buffer indicated by the
Index Register (RFARIR)
FIFO non-empty interrupt flag FNEAIF or FNEBIF is set in the
(GIFER). While the non-empty interrupt flag is set, the FlexRay module will not update the Message
Buffer Data Field related to message buffer indicated by
or the
3.4.5.3.2
For receive message buffers, receive shadow buffers, and receive FIFOs, the application must not write to
the message buffer data field.
For transmit message buffers, the application must follow the write access restrictions given in
150
0xN-2
0x0
0x2
...
Receive FIFO B Read Index Register
15
The FlexRay module will not access any locations outside the message
buffer data field boundaries given by
Message Buffer Data Field Read Access
Message Buffer Data Field Write Access
14
Receive FIFO for channel B
13
physical message buffer
DATA0 / MID0 / NMV0
Table 3-86. Message Buffer Data Field Minimum Length
or the
DATA2 / NMV2
Figure 3-109. Message Buffer Data Field Structure
DATA N-2
12
assigned to
...
Receive FIFO B Read Index Register (RFBRIR)
11
Message Buffer Index Registers
MFR4300 Data Sheet, Rev. 3
10
(RFBRIR).
9
NOTE
Table
8
RFDSR.ENTRY_SIZE (RFSR.SEL = 1)
Receive FIFO A Read Index Register (RFARIR)
3-86.
7
minimum length defined by
Global Interrupt Flag and Enable Register
6
5
(MBIDXRn). While the message
DATA1 / MID1 / NMV1
DATA3 / NMV3
DATA N-1
4
...
Receive FIFO A Read
when the related receive
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Freescale Semiconductor
2
Table
1
3-87.
0