mfr4300 Freescale Semiconductor, Inc, mfr4300 Datasheet - Page 205
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mfr4300
Manufacturer Part Number
mfr4300
Description
Flexray Communication Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MFR4300.pdf
(266 pages)
- Current page: 205 of 266
- Download datasheet (2Mb)
Chapter 4
Port Integration Module (PIM)
4.1
4.1.1
The Port Integration Module implements the interfaces between the FlexRay IP block, the peripheral
modules, and the I/O pins.
4.1.2
The Port Integration Module includes these distinctive features:
4.1.3
The Port Integration Module can be put into the following modes:
This is a high level description only; detailed descriptions of operating modes are contained in later
sections.
4.2
For detailed descriptions of particular pins and signals, refer to
Freescale Semiconductor
•
•
•
•
Pad control for all functional pads including:
— drive strength enable (DSE), via a control register
— pull enable (PUE), via a control register
— pull select (PUS), via a control register
Pin multiplexing and direction control for reset mode
Functional Mode
In this mode, the module drives each associated pin and has complete control of the direction of
that pin. The drive strength and pullup/pulldown enable are controlled via a set of control registers.
Reset Mode
In this mode, the pin configuration is changed for:
— clock output control: CLK_S0 and CLK_S1
— host interface control: IF_SEL0 and IF_SEL1
The control signals become available on the corresponding pins in reset mode. Refer to
“Clocks and Reset Generator
Introduction
External Signal Description
Overview
Features
Modes of Operation
(CRG)” for reset mode details.
MFR4300 Data Sheet, Rev. 3
Section 2.4, “Signal
Descriptions”.
Chapter 6,
205
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