mfr4300 Freescale Semiconductor, Inc, mfr4300 Datasheet - Page 213

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mfr4300

Manufacturer Part Number
mfr4300
Description
Flexray Communication Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
4.3.1.8
This register enables/disables the pullups/pulldowns of the host interface pins.
4.4
The Port Integration Module provides the capability to configure all functional I/O pins regarding:
4.4.1
In functional mode, the Port Integration Module controls the functional interface:
The module provides pullup/pulldown and drive strength control through configuration registers via the
IPBus interface. The actual control registers are described in
Registers”.
4.4.2
See
details.
Freescale Semiconductor
Address in MFR4300 = 0x00FE
Reset
RXD_BG1
RXD_BG2
1
W
Field
R
Section 4.2.2, “Reset
0
output drive with two selectable drive strengths
Pullup or pulldown
Pin multiplexing and pin configuration constraints for reset mode
Host Interface
Physical Layer Interface
Clock Interface
15
0
0
Functional Description
Functional Mode
Reset Mode
Receive data (channel A) pullup/pulldown control
0 pulldown
1 pullup
Receive data (channel B) pullup/pulldown control
0 pulldown
1 pullup
Physical Layer Pins Pullup/pulldown Control Register (PLPPCR)
14
0
0
Figure 4-8. Physical Layer Pins Pullup/pulldown Control Register (PLPPCR)
13
0
0
Mode” and
12
0
0
11
0
0
Table 4-9. PLPPCR Field Descriptions
Chapter 6, “Clocks and Reset Generator
10
0
0
MFR4300 Data Sheet, Rev. 3
0
0
9
0
0
8
Description
0
0
7
Section 4.3, “PIM Memory Map and
6
0
0
0
0
5
0
0
4
(CRG)” for reset mode
0
0
3
0
0
2
Write: Any Time
RXD_
BG2
1
0
RXD_
BG1
0
0
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