h8s-2646 Renesas Electronics Corporation., h8s-2646 Datasheet - Page 105

• Manufacturer Part Number: h8s-2646
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

MDS2 to MDS0 are read-only bits, and they cannot be written to. The mode pin (MD2 to MD0)
input levels are latched into these bits when MDCR is read. These latches are cancelled by a reset.
3.2.2
SYSCR is an 8-bit readable-writable register that selects saturating or non-saturating calculation
for the MAC instruction, selects the interrupt control mode, selects the detected edge for NMI, and
enables or disenables on-chip RAM.
SYSCR is initialized to H'01 by a reset and in hardware standby mode. SYSCR is not initialized in
software standby mode.
Bit 7—MAC Saturation (MACS): Selects either saturating or non-saturating calculation for the
MAC instruction.
Bit 6—Reserved: This bit is always read as 0 and cannot be modified.
Bits 5 and 4—Interrupt Control Mode 1 and 0 (INTM1, INTM0): These bits select the control
mode of the interrupt controller. For details of the interrupt control modes, see section 5.4.1,
Interrupt Control Modes and Interrupt Operation.
Bit 7
MACS
0
1
Bit 5
INTM1
0
1
Bit
Initial value
R/W
System Control Register (SYSCR)
Description
Non-saturating calculation for MAC instruction
Saturating calculation for MAC instruction
Bit 4
INTM0
0
1
0
1
:
:
:
MACS
R/W
7
0
Interrupt Control
Mode
0
—
2
—
—
—
6
0
INTM1
R/W
5
0
Description
Control of interrupts by I bit
Setting prohibited
Control of interrupts by I2 to I0 bits and IPR
Setting prohibited
INTM0
R/W
4
0
Rev. 5.00 Sep 22, 2005 page 79 of 1136
NMIEG
R/W
3
0
Section 3 MCU Operating Modes
R/W
—
2
0
REJ09B0257-0500
—
—
1
0
(Initial value)
(Initial value)
RAME
R/W
0
1