h8s-2646 Renesas Electronics Corporation., h8s-2646 Datasheet - Page 728

• Manufacturer Part Number: h8s-2646
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 20 ROM
20.7.4
Erase-Verify Mode
In erase-verify mode, data is read after memory has been erased to check whether it has been
correctly erased.
After the elapse of the fixed erase time, clear the E bit in FLMCR1, then wait for at least (t
) µs
ce
before clearing the ESU bit to exit erase mode. After exiting erase mode, the watchdog timer
setting is also cleared. The operating mode is then switched to erase-verify mode by setting the
EV bit in FLMCR1. Before reading in erase-verify mode, a dummy write of H'FF data should be
made to the addresses to be read. The dummy write should be executed after the elapse of (t
) µs
sev
or more. When the flash memory is read in this state (verify data is read in 16-bit units), the data at
the latched address is read. Wait at least (t
) µs after the dummy write before performing this read
sevr
operation. If the read data has been erased (all 1), a dummy write is performed to the next address,
and erase-verify is performed. If the read data is unerased, set erase mode again, and repeat the
erase/erase-verify sequence as before. The maximum number of repetitions of the erase/erase-
verify sequence is indicated by the maximum erase count (N). When verification is completed,
exit erase-verify mode, and wait for at least (t
) µs. If erasure has been completed on all the erase
cev
blocks, clear the SWE bit in FLMCR1, and leave a wait time of at least (t
) µs.
cswe
If erasing multiple blocks, set a single bit in EBR1/EBR2 for the next block to be erased, and
repeat the erase/erase-verify sequence as before.
Rev. 5.00 Sep 22, 2005 page 702 of 1136
REJ09B0257-0500