h8s-2646 Renesas Electronics Corporation., h8s-2646 Datasheet - Page 774

• Manufacturer Part Number: h8s-2646
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 22 Power-Down Modes
22.2.2
SCKCR is an 8-bit readable/writable register that performs φ clock output control and medium-
speed mode control.
SCKCR is initialized to H'00 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 7—φ Clock Output Disable (PSTOP): In combination with the DDR of the applicable port,
this bit controls φ output. See section 22.12, φ Clock Output Disable Function, for details.
Bits 6 to 4—Reserved: These bits are always read as 0 and cannot be modified.
Bit 3—Frequency Multiplication Factor Switching Mode Select (STCS): Selects the operation
when the PLL circuit frequency multiplication factor is changed.
Rev. 5.00 Sep 22, 2005 page 748 of 1136
REJ09B0257-0500
Bit 7
PSTOP
0
1
Bit 3
STCS
0
1
Bit
Initial value
R/W
System Clock Control Register (SCKCR)
High Speed Mode,
Medium Speed Mode,
Subactive Mode
φ output (initial value)
Fixed high
Description
Specified multiplication factor is valid after transition to software standby mode, watch
mode, or subactive mode
Specified multiplication factor is valid immediately after STC bits are rewritten
:
:
:
PSTOP
R/W
7
0
—
—
6
0
Sleep Mode,
Subsleep Mode
φ output
Fixed high
—
—
5
0
Description
—
—
4
0
Software Standby
Mode, Watch Mode,
and Direct Transition
Fixed high
Fixed high
STCS
R/W
3
0
SCK2
R/W
2
0
SCK1
R/W
Hardware
Standby Mode
High impedance
High impedance
1
0
(Initial value)
SCK0
R/W
0
0