h8s-2646 Renesas Electronics Corporation., h8s-2646 Datasheet - Page 759
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h8s-2646
Manufacturer Part Number
h8s-2646
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2646.pdf
(1165 pages)
- Current page: 759 of 1165
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Bit 3—Frequency Multiplication Factor Switching Mode Select (STCS): Selects the operation
when the PLL circuit frequency multiplication factor is changed.
Bits 2 to 0—System Clock Select 2 to 0 (SCK2 to SCK0): These bits select the bus master
clock.
21.2.2
LPWRCR is an 8-bit readable/writable register that performs power-down mode control. The
following pertains to bits 1 and 0. For details of the other bits, see section 22.2.3, Low-Power
Control Register (LPWRCR). LPWRCR is initialized to H'00 by a reset and in hardware standby
mode. It is not initialized in software standby mode.
Bits 1 and 0—Frequency Multiplication Factor (STC1, STC0): The STC bits specify the
frequency multiplication factor of the PLL circuit.
Bit 3
STCS
0
1
Bit 2
SCK2
0
1
Bit
Initial value
Read/Write
Low-Power Control Register (LPWRCR)
Bit 1
SCK1
0
1
0
1
Description
Specified multiplication factor is valid after recovery from software standby mode,
watch mode, or subactive mode
Specified multiplication factor is valid immediately after STC bits are rewritten
DTON
R/W
Bit 0
SCK0
0
1
0
1
0
1
—
7
0
LSON
R/W
Description
Bus master is in high-speed mode
Medium-speed clock is φ/2
Medium-speed clock is φ/4
Medium-speed clock is φ/8
Medium-speed clock is φ/16
Medium-speed clock is φ/32
—
6
0
NESEL
R/W
5
0
SUBSTP
R/W
4
0
Rev. 5.00 Sep 22, 2005 page 733 of 1136
RFCUT
R/W
3
0
Section 21 Clock Pulse Generator
R/W
—
2
0
STC1
R/W
REJ09B0257-0500
1
0
(Initial value)
(Initial value)
STC0
R/W
0
0
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