h8s-2646 Renesas Electronics Corporation., h8s-2646 Datasheet - Page 453

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h8s-2646

Manufacturer Part Number
h8s-2646
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
• WDT1 Input Clock Select
Note: * An overflow period is the time interval between the start of counting up from H'00 on the
12.2.3
Note: * Can only be written with 0 for flag clearing.
RSTCSR is an 8-bit readable/writable * register that controls the generation of the internal reset
signal when TCNT overflows, and selects the type of internal reset signal.
Bit 4
PSS
0
1
Bit
Initial value :
R/W
TCNT and the occurrence of a TCNT overflow.
Bit 2
CKS2
0
1
0
1
Reset Control/Status Register (RSTCSR)
:
:
Bit 1
CKS1
0
1
0
1
0
1
0
1
R/(W) *
WOVF
7
0
Bit 0
CKS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
RSTE
R/W
6
0
Description
Clock
φ/2 (initial value)
φ/64
φ/128
φ/512
φ/2048
φ/8192
φ/32768
φ/131072
φSUB/2
φSUB/4
φSUB/8
φSUB/16
φSUB/32
φSUB/64
φSUB/128
φSUB/256
R/W
5
0
4
1
Overflow Period * (where φ φ φ φ = 20 MHz)
(where φ φ φ φ SUB = 32.768 kHz)
25.6 µs
819.2 µs
1.6 ms
6.6 ms
26.2 ms
104.9 ms
419.4 ms
1.68 s
15.6 ms
31.3 ms
62.5 ms
125 ms
250 ms
500 ms
1 s
2 s
Rev. 5.00 Sep 22, 2005 page 427 of 1136
3
1
Section 12 Watchdog Timer
2
1
REJ09B0257-0500
1
1
0
1

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