h8s-2646 Renesas Electronics Corporation., h8s-2646 Datasheet - Page 792

• Manufacturer Part Number: h8s-2646
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 22 Power-Down Modes
22.10
22.10.1 Subactive Mode
When the SLEEP instruction is executed in high-speed mode with the SBYCR SSBY bit = 1,
LPWRCR DTON bit = 1, LSON bit = 1, and TCSR (WDT1) PSS bit = 1, CPU operation shifts to
subactive mode. When an interrupt occurs in watch mode, and if the LSON bit of LPWRCR is 1, a
transition is made to subactive mode. And if an interrupt occurs in subsleep mode, a transition is
made to subactive mode.
In subactive mode, the CPU operates at low speed on the subclock, and the program is executed
step by step. Supporting modules other than WDT0, and WDT1 are also stopped.
When operating the CPU in subactive mode, the SCKCR SCK2 to SCK0 bits must be set to 0.
22.10.2 Exiting Subactive Mode
Subactive mode is exited by the SLEEP instruction or the RES or STBY pins.
Exiting Subactive Mode by SLEEP Instruction: When the SLEEP instruction is executed with
the SBYCR SSBY bit = 1, LPWRCR DTON bit = 0, and TCSR (WDT1) PSS bit = 1, the CPU
exits subactive mode and a transition is made to watch mode. When the SLEEP instruction is
executed with the SBYCR SSBY bit = 0, LPWRCR LSON bit = 1, and TCSR (WDT1) PSS bit =
1, a transition is made to subsleep mode. Finally, when the SLEEP instruction is executed with the
SBYCR SSBY bit = 1, LPWRCR DTON bit = 1, LSON bit = 0, and TCSR (WDT1) PSS bit = 1, a
direct transition is made to high-speed mode (SCK0 to SCK2 all 0).
See section 22.11, Direct Transitions, for details of direct transitions.
Exiting Subactive Mode by RES
Claering with the RES pins in section 22.6.2, Clearing Software Standby Mode.
Exiting Subactive Mode by STBY
made to hardware standby mode.
Rev. 5.00 Sep 22, 2005 page 766 of 1136
REJ09B0257-0500
Subactive Mode
RES
RES Pins: For exiting subactive mode by the RES pins, see,
STBY Pin: When the STBY pin level is driven Low, a transition is
STBY
RES
STBY