h8s-2646 Renesas Electronics Corporation., h8s-2646 Datasheet - Page 417

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h8s-2646

Manufacturer Part Number
h8s-2646
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Contention between TCNT Write and Overflow/Underflow: If there is an up-count or down-
count in the T2 state of a TCNT write cycle, and overflow/underflow occurs, the TCNT write
takes precedence and the TCFV/TCFU flag in TSR is not set.
Figure 10.57 shows the operation timing when there is contention between TCNT write and
overflow.
Multiplexing of I/O Pins: In the H8S/2646 Group, the TCLKA input pin is multiplexed with the
TIOCC0 I/O pin, the TCLKB input pin with the TIOCD0 I/O pin, the TCLKC input pin with the
TIOCB1 I/O pin, and the TCLKD input pin with the TIOCB2 I/O pin. When an external clock is
input, compare match output should not be performed from a multiplexed pin.
Interrupts and Module Stop Mode: If module stop mode is entered when an interrupt has been
requested, it will not be possible to clear the CPU interrupt source or the DTC activation source.
Interrupts should therefore be disabled before entering module stop mode.
Address
Write signal
TCNT
TCFV flag
Figure 10.57 Contention between TCNT Write and Overflow
H'FFFF
Prohibited
TCNT write cycle
T1
TCNT address
Rev. 5.00 Sep 22, 2005 page 391 of 1136
T2
Section 10 16-Bit Timer Pulse Unit (TPU)
M
TCNT write data
REJ09B0257-0500

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