h8s-2646 Renesas Electronics Corporation., h8s-2646 Datasheet - Page 91

• Manufacturer Part Number: h8s-2646
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

2.8.2
When the RES goes low, all current processing stops and the CPU enters the reset state. In reset
state all interrupts are disenabled.
Reset exception handling starts when the RES signal changes from low to high.
The reset state can also be entered by a watchdog timer overflow. For details, refer to section 12,
Watchdog Timer.
Notes: 1.
2.
3.
Reset State
From any state except hardware standby mode, a transition to the reset state occurs whenever RES
goes low. A transition can also be made to the reset state when the
watchdog timer overflows.
From any state, a transition to hardware standby mode occurs when STBY goes low.
Apart from these states, there are also the watch mode, subactive mode, and the subsleep mode.
See section 22, Power-Down Modes.
Exception handling state
Bus-released state
Reset state
RES= High
*1
Figure 2.15 State Transitions
External interrupt request
Program execution state
End of bus request
Bus request
STBY= High, RES= Low
Rev. 5.00 Sep 22, 2005 page 65 of 1136
Hardware standby mode
Software standby mode
Power-down state
Sleep mode
REJ09B0257-0500
Section 2 CPU
*3
*2