LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 248

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LSI53C875

Manufacturer Part Number
LSI53C875
Description
PCI to Ultra SCSI I/O Processor
Manufacturer
LSI Logic
Datasheet

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Table 7.17
Figure 7.7
MAD
7-12
RST/
CLK
Symbol
1
t
t
t
t
1
2
3
4
1. When enabled.
Parameter
Reset pulse width
Reset deasserted setup to CLK HIGH
MAD setup time to CLK HIGH
(for configuring the MAD bus only)
MAD hold time from CLK HIGH
(for configuring the MAD bus only)
Reset Input
Reset Input
Table 7.17
Instruction Set of the I/O Processor
t
1
and
Figure 7.7
t
2
provide Reset Input timing data.
Min
10
20
20
0
Valid Data
t
3
t
4
Max
Unit
t
CLK
ns
ns
ns

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