MT46V128M8 MICRON [Micron Technology], MT46V128M8 Datasheet - Page 27

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MT46V128M8

Manufacturer Part Number
MT46V128M8
Description
DOUBLE DATA RATE (DDR) SDRAM
Manufacturer
MICRON [Micron Technology]
Datasheet

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NOTE:
09005aef8076894f
1gbDDRx4x8x16_2.fm - Rev. A 3/03 EN
1. DO n = data-out from column n.
2. Burst length = 4, or an interrupted burst of 8.
3. Three subsequent elements of data-out appear in the programmed order following DO n.
4. Shown with nominal
5. READ to PRECHARGE equals two clocks, which allows two data pairs of data-out.
6. A READ command with AUTO-PRECHARGE enabled, provided
7. PRE = PRECHARGE command; ACT = ACTIVE command.
number of clock cycles after the READ command, where x = BL / 2.
COMMAND
COMMAND
ADDRESS
ADDRESS
DQS
DQS
CK#
CK#
DQ
DQ
CK
CK
6
6
t
AC,
Bank a,
Bank a,
READ
READ
Col n
Col n
T0
T0
t
DQSCK, and
Figure 17: READ to PRECHARGE
CL = 2
t
DQSQ.
NOP
NOP
T1
T1
CL = 2.5
(a or all)
(a or all)
Bank a,
Bank a,
T2
PRE
PRE
T2
27
DO
t
n
RAS(min) is met, would cause a precharge to be performed at x
T2n
T2n
DO
Micron Technology, Inc., reserves the right to change products or specifications without notice.
n
NOP
NOP
T3
T3
DON’T CARE
t RP
t RP
T3n
T3n
T4
T4
NOP
NOP
1Gb: x4, x8, x16
TRANSITIONING DATA
DDR SDRAM
Bank a,
Bank a,
PRELIMINARY
T5
T5
ACT
Row
ACT
Row
©2003 Micron Technology. Inc.

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