MT46V128M8 MICRON [Micron Technology], MT46V128M8 Datasheet - Page 67

• Manufacturer Part Number: MT46V128M8
• Description: DOUBLE DATA RATE (DDR) SDRAM
• Manufacturer: MICRON [Micron Technology]

NOTE:
09005aef8076894f
1gbDDRx4x8x16_2.fm - Rev. A 3/03 EN
1. DOn = data-out from column n; subsequent elements are provided in the programmed order.
2. Burst length = 4 in the case shown.
3. Disable auto precharge.
4. “Don’t Care” if A10 is HIGH at T5.
5. PRE = PRECHARGE, ACT = ACTIVE, RA = Row Address, BA = Bank Address.
6. NOP commands are shown for ease of illustration; other commands may be valid at these times.
7. The PRECHARGE command can only be applied at T5 if
8. Refer to Figure 38 on page 60, Figure 39 on page 61, and Figure 40 on page 62 for detailed DQS and DQ timing.
x4: A0-A9, A11, A12
x16: A11, A12, A13
x8: A0-A9, A11
COMMAND
x8: A12, A13
x16: A0-A9
BA0, BA1
Case 1:
Case 2:
x4: A13
DQS
DQ
DQS
DQ
CK#
CKE
A10
DM
CK
1
1
5
t
t
AC (MIN) and
AC (MAX) and
t
t
IS
IS
NOP 6
T0
t
t
IH
t
IH
DQSCK (MIN)
t
DQSCK (MAX)
Figure 46: Bank Read - Without Auto Precharge
t
Bank x
t
IS
IS
ACT
T1
RA
RA
RA
t
t
IH
IH
t
CK
t
t
RAS 7
RCD
t
RC
NOP 6
T2
t
CH
t
CL
Bank x
READ 2
t
Col n
IS
3
t
T3
RAS minimum is met.
t
t
IH
LZ (MIN)
CL = 2
67
NOP 6
T4
t
RPRE
t
LZ (MIN)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
RPRE
ALL BANKS
ONE BANK
Bank x 4
PRE
T5
7
t
DO
DQSCK (MIN)
n
t
t
AC (MIN)
DQSCK
DO
t
n
AC (MAX)
T5n
t
(MAX)
RP
NOP 6
T6
1Gb: x4, x8, x16
t
HZ (MAX)
T6n
t
RPST
t
RPST
DDR SDRAM
NOP 6
T7
TRANSITIONING DATA
DON’T CARE
PRELIMINARY
©2003 Micron Technology. Inc.
Bank x
T8
ACT
RA
RA
RA