MT46V128M8 MICRON [Micron Technology], MT46V128M8 Datasheet - Page 56
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MT46V128M8
Manufacturer Part Number
MT46V128M8
Description
DOUBLE DATA RATE (DDR) SDRAM
Manufacturer
MICRON [Micron Technology]
Datasheet
1.MT46V128M8.pdf
(74 pages)
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09005aef8076894f
1gbDDRx4x8x16_2.fm - Rev. A 3/03 EN
33. The clock is allowed up to ±150ps of jitter. Each
34.
35. READs and WRITEs with auto precharge are not
36. Any positive glitch must be less than 1/3 of the
37. Normal Output Drive Curves:
timing parameter is allowed to vary by the same
amount.
t
minimum actually applied to the device CK and
CK# inputs, collectively during bank active.
allowed to be issued until
fied prior to the internal precharge command
being issued.
clock cycle and not more than +400mV or 2.9V,
whichever is less. Any negative glitch must be less
than 1/3 of the clock cycle and not exceed either
-300mV or 2.2V, whichever is more positive.
a. The full variation in driver pull-down current
b. The variation in driver pull-down current
c. The full variation in driver pull-up current
d. The variation in driver pull-up current within
e. The full variation in the ratio of the maximum
HP (MIN) is the lesser of
from minimum to maximum process, temper-
ature and voltage will lie within the outer
bounding lines of the V-I curve of Figure 34
within nominal limits of voltage and tempera-
ture is expected, but not guaranteed, to lie
within the inner bounding lines of the V-I
curve of Figure 34.
from minimum to maximum process, temper-
ature and voltage will lie within the outer
bounding lines of the V-I curve of Figure 35.
nominal limits of voltage and temperature is
expected, but not guaranteed, to lie within the
inner bounding lines of the V-I curve of
Figure 35.
to minimum pull-up and pull-down current
should be between 0.71 and 1.4, for device
drain-to-source voltages from 0.1V to 1.0V, and
at the same voltage and temperature. f ) The
full variation in the ratio of the nominal pull-
up to pull-down current should be unity ±10
percent, for device drain-to-source voltages
from 0.1V to 1.0V.
t
RAS (MIN) can be satis-
t
CL minimum and
t
CH
56
38. Reduced Output Drive Curves:
160
140
120
100
-100
-120
-140
-160
-180
-200
80
60
40
20
-20
-40
-60
-80
0
0
0.0
0.0
a. The full variation in driver pull-down current
b. The variation in driver pull-down current
c. The full variation in driver pull-up current
d. The variation in driver pull-up current within
Figure 34: Full Drive Pull-Down
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Figure 35: Full Drive Pull-Up
from minimum to maximum process, temper-
ature and voltage will lie within the outer
bounding lines of the V-I curve of Figure 36.
within nominal limits of voltage and tempera-
ture is expected, but not guaranteed, to lie
within the inner bounding lines of the V-I
curve of Figure 36.
from minimum to maximum process, temper-
ature and voltage will lie within the outer
bounding lines of the V-I curve of Figure 37.
nominal limits of voltage and temperature is
expected, but not guaranteed, to lie within the
inner bounding lines of the V-I curve of
Figure 37.
0.5
0.5
Characteristics
Characteristics
1.0
1.0
V
DD
1Gb: x4, x8, x16
V
Q - V
OUT
(V)
OUT
DDR SDRAM
(V )
1.5
1.5
PRELIMINARY
©2003 Micron Technology. Inc.
2.0
2.0
2.5
2.5