CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 133

• Manufacturer Part Number: CY8C20X34
• Description: Technical Reference Manual (TRM)
• Manufacturer: CYPRESS [Cypress Semiconductor]

19.2
The following registers are associated with the Programmable Timer and are listed in address order. The register descriptions
have an associated register table showing the bit structure for that register. The bits in the tables that are grayed out are
reserved bits and are not detailed in the register descriptions that follow. Reserved bits should always be written with a value
of ‘0’. For a complete table of programmable timer registers, refer to the
on page
19.2.1
The Programmable Timer Configuration Register (PT_CFG)
configures the PSoC’s programmable timer.
Bit 1: One Shot. This bit determines if the timer runs in one
shot mode or continuous mode. In one-shot mode the timer
completes one full count cycle and terminates. Upon termi-
nation, the START bit in this register is cleared. In continu-
ous mode, the timer reloads the count value each time upon
completion of its count cycle and repeats.
19.2.2
The Programmable Timer Data Register 1 (PT_DATA1)
holds the upper 5 bits of the progammable timer’s count
value.
19.2.3
The Programmable Timer Data Register 0 (PT_DATA0)
holds the lower 8 bits of the progammable timer’s count
value.
PSoC CY8C20x34 TRM, Version 1.0
0,B0h
0,B1h
0,B2h
Address
Address
Address
90.
Register Definitions
PT_CFG
PT_DATA1
PT_DATA0
PT_CFG Register
PT_DATA1 Register
PT_DATA0 Register
Name
Name
Name
Bit 7
Bit 7
Bit 7
Bit 6
Bit 6
Bit 6
Bit 5
Bit 5
Bit 5
Bit 4
Bit 4
Bit 4
Bit 0: START. This bit starts the timer counting from a full
count. The full count is determined by the value loaded into
the DATA registers. This bit is cleared when the timer is run-
ning in one shot mode upon completion of a full count cycle.
For additional information, refer to the
page
Bits 4 to 0: Data[4:0]. These bits hold the upper 5 bits of
the timer’s 13-bit count value.
For additional information, refer to the
on page
Bits 7 to 0: Data[7:0]. These bits hold the lower 8 bits of
the timer’s13-bit count value.
For additional information, refer to the
on page
Data[7:0]
162.
“Summary Table of the System Resource Registers”
Bit 3
Bit 3
Bit 3
163.
164.
Data[4:0]
Bit 2
Bit 2
Bit 2
One Shot
Bit 1
Bit 1
Bit 1
Programmable Timer
PT_CFG register on
PT_DATA1 register
PT_DATA0 register
START
Bit 0
Bit 0
Bit 0
Access
RW : 00
Access
RW : 00
Access
RW : 00
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