CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 185
CY8C20X34
Manufacturer Part Number
CY8C20X34
Description
Technical Reference Manual (TRM)
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY8C20X34.pdf
(218 pages)
- Current page: 185 of 218
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20.4.3
This register is used to configure the SPI.
The values in this register should not be changed while the block is enabled.
For additional information, refer to the
Bit
7:5
4
3
2
1
0
PSoC CY8C20x34 TRM, Version 1.0
Individual Register Names and Addresses:
SPI_CFG : 1,29h
Access : POR
Bit Name
Clock Sel
Bypass
SS_
SS_EN_
Int Sel
Slave
Name
SPI_CFG
SPI Configuration Register
7
Clock Sel
RW : 0
6
Description
SYSCLK in Master mode
000b
001b
010b
011b
100b
101b
110b
111b
Bypass Synchronization
0
1
Slave Select in Slave mode
0
1
Internal Slave Select Enable
0
1
Interrupt Select
0
1
0
1
Register Definitions on page 119
/ 2
/ 4
/ 8
/ 16
/ 32
/ 64
/ 128
/ 256
All pin unputs are doubled, synchronized
Input synchronization is bypassed.
Slave selected
Slave not selected
Slave selection determined from SS_ bit
Slave selection determined from external SS_ pin
Interrupt on TX Reg Empty
Interrupt on SPI Complete
Operates as a master.
Operates as a slave.
5
Bypass
RW : 0
4
in the SPI chapter.
RW : 0
SS_
3
SS_EN_
RW : 0
2
1,29h
RW : 0
Int Sel
1
RW : 0
SPI_CFG
Slave
1,29h
0
185
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