CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 150

• Manufacturer Part Number: CY8C20X34
• Description: Technical Reference Manual (TRM)
• Manufacturer: CYPRESS [Cypress Semiconductor]

CMP_CR1
20.3.11
This register is used to configure the comparator output options.
For additional information, refer to the
Bit
7
6
5
4
3
2
1
(continued on next page)
150
Individual Register Names and Addresses:
CMP_CR1 : 0,7Bh
Access : POR
Bit Name
0,7Bh
CINT1
CPIN1
CRST1
CDS1
CINT0
CPIN0
CRST0
Name
CMP_CR1
Comparator Control Register 1
RW : 0
CINT1
7
RW : 0
CPIN1
6
Description
0
1
Bit selects the source for resetting the Comparator 1 latch.
0
1
Bit selects the source for resetting the Comparator 0 latch.
Bit selects comparator 1 for input to the analog interrupt. Note that if both CINT1 and CINT0 are set
high, a rising edge on either comparator output may cause an interrupt.
Bit selects the Comparator 1 signal for possible connection to the GPIO pin. Connection to the pin
also depends on the configuration of the OUT_P1 register.
0
1
0
1
Bit selects the data output for the comparator 1 channel, for routing to the capacitive sense logic and
comparator 1 interrupt.
0
1
Bit selects comparator 0 for input to the analog interrupt. Note that if both CINT1 and CINT0 are set
high, a rising edge on either comparator output may cause an interrupt.
Bit selects the Comparator 0 signal for possible connection to the GPIO pin. Connection to the pin
also depends on the configuration of the OUT_P1 register.
0
1
0
1
Register Definitions on page 86
Comparator 1 does not connect to the analog interrupt.
Comparartor 1 connects to the analog interrupt. A rising edge will assert that interrupt, if it is
enabled in the INT_MSK0 register.
Select Comparator 1 LUT output
Select Comparator 1 Latch output
Reset by writing a ‘0’ to the CMP_RDC register’s CMP1L bit
Reset by rising edge of Comparator 0 LUT output
Select the Comparator 1 LUT output
Select the Comparator 1 latch output
Comparator 0 does not connect to the analog interrupt.
Comparartor 0 connects to the analog interrupt. A rising edge will assert that interrupt, if it is
enabled in the INT_MSK0 register.
Select Comparator 0 LUT output
Select Comparator 0 Latch output
Reset by writing a ‘0’ to the CMP_RDC register’s CMP0L bit
Reset by rising edge of Comparator 1 LUT output
CRST1
RW : 0
5
RW : 0
CDS1
4
in the Comparators chapter .
RW : 0
CINT0
3
RW : 0
CPIN0
PSoC CY8C20x34 TRM, Version 1.0
2
CRST0
RW : 0
1
0,7Bh
RW : 0
CDS0
0