CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 147

• Manufacturer Part Number: CY8C20X34
• Description: Technical Reference Manual (TRM)
• Manufacturer: CYPRESS [Cypress Semiconductor]

20.3.8
This register is used to read the state of the comparator data signal, and the latched state of the comparator.
In the table above, reserved bits are grayed table cells and are not described in the bit description section below. Reserved
bits should always be written with a value of ‘0’. For additional information, refer to the
Comparators chapter.
Bit
5
4
1
0
PSoC CY8C20x34 TRM, Version 1.0
Individual Register Names and Addresses:
CMP_RDC : 0,78h
Access : POR
Bit Name
CMP1D
CMP0D
CMP1L
CMP0L
Name
CMP_RDC
Comparator Read/Clear Register
7
6
Read-only bit that returns the dynamically changing state of comparator 1. This bit reads zero when-
ever the comparator is disabled.
Read-only bit that returns the dynamically changing state of comparator 0. This bit reads zero when-
ever the comparator is disabled.
Bit reads the latch output for comparator 1. This bit is cleared by either a write of ‘0’ to this bit, or by a
rising edge of the comparator 0 LUT, depending on the state of the CRST1 bit in the CMP_CR1 reg-
ister.
Bit reads the latch output for comparator 0. This bit is cleared by either a write of ‘0’ to this bit, or by a
rising edge of the comparator 1 LUT, depending on the state of the CRST0 bit in the CMP_CR1 reg-
ister.
Description
CMP1D
R : 0
5
CMP0D
R : 0
4
3
Register Definitions on page 86
2
0,78h
CMP1L
RC : 0
1
CMP_RDC
CMP0L
RC : 0
0,78h
0
in the
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