CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 20
CY8C20X34
Manufacturer Part Number
CY8C20X34
Description
Technical Reference Manual (TRM)
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY8C20X34.pdf
(218 pages)
- Current page: 20 of 218
- Download datasheet (3Mb)
Pin Information
1.1.2
Table 1-2. 32-Pin Part Pinout (QFN**)
20
No.
LEGEND A = Analog, I = Input, O = Output, H = 5 mA High Output Drive.
Pin
10
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
11
1
2
3
4
5
6
7
8
9
Digital
IOH
IOH
IOH
IOH
IOH
IOH
IOH
IOH
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
** The center pad on the QFN package should be connected to
* These are the ISSP pins, which are not High Z at POR (Power
Power
Power
Power
Type
Input
ground (Vss) for best mechanical, thermal, and electrical perfor-
mance. If not connected to ground, it should be electrically
floated and not connected to any other signal.
On Reset).
Analog
32-Pin Part Pinout
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
P0[1]
P2[7]
P2[5]
P2[3]
P2[1]
P3[3]
P3[1]
P1[7]
P1[5]
P1[3]
P1[1]
Vss
P1[0]
P1[2]
P1[4]
P1[6]
XRES
P3[0]
P3[2]
P2[0]
P2[2]
P2[4]
P2[6]
P0[0]
P0[2]
P0[4]
P0[6]
Vdd
P0[7]
P0[5]
P0[3]
Vss
Name
I2C SCL, SPI SS
I2C SDA, SPI MISO
SPI CLK
CLK*, I2C SCL, SPI MOSI
Ground connection
DATA*, I2C SDA
Optional external clock input (EXTCLK)
Active high external reset with internal
pull down
Analog bypass
Supply voltage
Integrating input
Ground connection
Description
AI, I2C SCL, SPI SS, P1[7]
CY8C20434 32-Pin PSoC Device
AI, P0[1]
AI, P2[7]
AI, P2[5]
AI, P2[3]
AI, P2[1]
AI, P3[3]
AI, P3[1]
2
1
3
4
5
6
7
8
PSoC CY8C20x34 TRM, Version 1.0
(Top View)
QFN
24
23
22
21
20
19
18
17
P0[0], AI
P2[6], AI
P2[4], AI
P2[2], AI
P2[0], AI
P3[2], AI
P3[0], AI
XRES
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