CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 78

• Manufacturer Part Number: CY8C20X34
• Description: Technical Reference Manual (TRM)
• Manufacturer: CYPRESS [Cypress Semiconductor]

CapSense Module
10.2.4
The CapSense Control Register 3 (CS_CR3) contains con-
trol bits primarily for the low pass filter and reference buffer.
Bit 7: IBOOST. This bit adds an offset current to all IDAC
settings, so a zero value in the IDAC_D register does not
give zero current out. This affects all IDAC functions, includ-
ing the relaxation oscillator.
Bit 6: REFMUX. This bit selects between VREF and REFHI
for the reference buffer input.
Bit 5: REFMODE. This bit is used for manual connection of
the reference buffer to the analog global bus. If either the
CI_EN or RO_EN bits are set high in the CS_CR2 register,
this bit has no effect.
10.2.5
The CapSense Counter Low Byte Register (CS_CNTL) con-
tains the current count for the low byte counter.
10.2.6
The CapSense Counter High Byte Register (CS_CNTH)
contains the current count value for the high byte counter.
78
0,A3h
0,A4h
0,A5h
Address
Address
Address
CS_CR3
CS_CNTL
CS_CNTH
CS_CR3 Register
CS_CNTL Register
CS_CNTH Register
Name
Name
Name
IBOOST
Bit 7
Bit 7
Bit 7
REFMUX
Bit 6
Bit 6
Bit 6
REFMODE
Bit 5
Bit 5
Bit 5
REF_EN
Bit 4
Bit 4
Bit 4
Data[7:0]
Data[7:0]
Bit 4: REF_EN. This bit enables the reference buffer to
drive to the analog global bus.
Bits 3 and 2: LPFilt[1:0]. These bits control the time con-
stant of the low pass filter that connects to the analog bus.
Bits 1 and 0: LPF_EN[1:0]. These bits are used to connect
a low pass filter into the input of either comparator channel.
For additional information, refer to the
page
Bits 7 to 0: Data[7:0]. This value contains the current
count for the counter low block. The block must be stopped
to read a valid value.
For additional information, refer to the
page
Bits 7 to 0: Data[7:0]. This value contains the current
count for the counter high block. The block must be stopped
to read a valid value.
For additional information, refer to the
page
LPFilt[1:0]
00
01
10
11
156.
157.
158.
Bit 3
Bit 3
Bit 3
LPFilt[1:0]
1 ms
2 ms
5 ms
10 ms
Bit 2
Bit 2
Bit 2
PSoC CY8C20x34 TRM, Version 1.0
Frequency of Operation
Bit 1
Bit 1
Bit 1
LPF_EN[1:0]
CS_CNTH register on
CS_CNTL register on
CS_CR3 register on
Bit 0
Bit 0
Bit 0
Access
RW : 00
Access
RO : 00
Access
RO : 00