CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 23
CY8C20X34
Manufacturer Part Number
CY8C20X34
Description
Technical Reference Manual (TRM)
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY8C20X34.pdf
(218 pages)
- Current page: 23 of 218
- Download datasheet (3Mb)
The PSoC Core section discusses the core components of a PSoC device with a base part number of CY8C20x34 and the
registers associated with those components. The core section covers the heart of the PSoC device, which includes the M8C
microcontroller; SROM, interrupt controller, GPIO, and SRAM paging; multiple clock sources such as IMO and ILO; and
sleep and watchdog functionality. This section contains these chapters:
Top-Level Core Architecture
The figure below illustrates the top-level architecture of the PSoC’s core. Each component of the figure is discussed in detail
in this section.
PSoC CY8C20x34 TRM, Version 1.0
Section B:
CPU Core (M8C) on page
RAM Paging on page
Supervisory ROM (SROM) on page
Interrupt Controller on page
Controller
Interrupt
SRAM
6/12 MHz Internal Main Oscillator (IMO)
33.
SYSTEM BUS
PSoC CORE
27.
47.
PSoC Core
Supervisory ROM (SROM)
39.
PSoC Core Block Diagram
Multiple Clock Sources
Port 3
CPU Core (M8C)
Port 2
Flash Nonvolatile Memory
General Purpose IO (GPIO) on page
Internal Main Oscillator (IMO) on page
Internal Low Speed Oscillator (ILO) on page
Sleep and Watchdog on page
Internal Low Speed Oscillator (ILO)
Port 1
Port 0
LDO
Sleep and
Watchdog
3V
63.
53.
59.
61.
23
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