HD6417618 RENESAS [Renesas Technology Corp], HD6417618 Datasheet - Page 350

• Manufacturer Part Number: HD6417618
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 13 Compare Match Timer (CMT)
Note: *
13.2.3
CMCNT is a 16-bit register used as an up-counter. When the counter input clock is selected with
bits CKS1 and CKS0 in CMCSR and the STR bit in CMSTR is set to 1, CMCNT starts counting
using the selected clock.
When the value in CMCNT and the value in compare match constant register (CMCOR) match,
CMCNT is cleared to H'0000 and the CMF flag in CMCSR is set to 1.
CMCNT is initialized to H'0000 by a power-on reset and a transition to standby mode.
13.2.4
CMCOR is a 16-bit register that sets the interval up to a compare match with CMCNT.
CMCOR is initialized to H'FFFF by a power-on reset and is initialized to H'FFFF in standby
mode.
Rev. 6.00 Jun. 12, 2007 Page 318 of 610
REJ09B0131-0600
Bit
1
0
Compare Match Counter (CMCNT)
Compare Match Constant Register (CMCOR)
Only 0 can be written, to clear the flag.
Bit Name
CKS1
CKS0
Initial
value
0
0
R/W
R/W
R/W
Description
Clock Select 1 and 0
Select the clock to be input to CMCNT from four
internal clocks obtained by dividing the peripheral
operating clock (Pφ). When the STR bit in CMSTR is
set to 1, CMCNT starts counting on the clock selected
with bits CKS1 and CKS0.
00: Pφ/8
01: Pφ/32
10: Pφ/128
11: Pφ/512