HD6417618 RENESAS [Renesas Technology Corp], HD6417618 Datasheet - Page 63

• Manufacturer Part Number: HD6417618
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

2.4.3
This section describes the instruction formats, and the meaning of the source and destination
operands. The meaning of the operands depends on the instruction code. The following symbols
are used in the table.
xxxx: Instruction code
mmmm: Source register
nnnn: Destination register
iiii: Immediate data
dddd: Displacement
Addressing
Mode
PC relative
Immediate
Instruction Formats
#imm:8
Instruction
Format
Rn
#imm:8
#imm:8
8-bit immediate data imm of TST, AND, OR,
Effective Address Calculation Method
Effective address is sum of PC and Rn.
or XOR instruction is zero-extended.
8-bit immediate data imm of MOV, ADD, or
CMP/EQ instruction is sign-extended.
8-bit immediate data imm of TRAPA instruction
is zero-extended and multiplied by 4.
Rn
PC
+
PC
+
Rn
Rev. 6.00 Jun. 12, 2007 Page 31 of 610
Calculation
Formula
PC + Rn



REJ09B0131-0600
Section 2 CPU