ATMEga64L ATMEL Corporation, ATMEga64L Datasheet - Page 108

• Manufacturer Part Number: ATMEga64L
• Description: 8-bit AVR Microcontroller with 64K Bytes In-System Programmable Flash
• Manufacturer: ATMEL Corporation

Timer/Counter Prescaler
108
ATmega64(L)
• Bit 0 – TOV0: Timer/Counter0 Overflow Flag
The bit TOV0 is set (one) when an overflow occurs in Timer/Counter0. TOV0 is cleared
by hardware when executing the corresponding interrupt handling vector. Alternatively,
TOV0 is cleared by writing a logic one to the flag. When the SREG I-bit, TOIE0
(Timer/Counter0 Overflow Interrupt Enable), and TOV0 are set (one), the
Timer/Counter0 Overflow interrupt is executed. In PWM mode, this bit is set when
Timer/Counter0 changes counting direction at 0x00.
Figure 45. Prescaler for Timer/Counter0
The clock source for Timer/Counter0 is named clk
the main system clock clk
chronously clocked from the TOSC1 pin. This enables use of Timer/Counter0 as a Real
Time Counter (RTC). When AS0 is set, pins TOSC1 and TOSC2 are disconnected from
Port C. A crystal can then be connected between the TOSC1 and TOSC2 pins to serve
as an independent clock source for Timer/Counter0. The Oscillator is optimized for use
with a 32.768 kHz crystal. Applying an external clock source to TOSC1 is not
recommended.
For Timer/Counter0, the possible prescaled selections are: clk
clk
selected. Setting the PSR0 bit in SFIOR resets the prescaler. This allows the user to
operate with a predictable prescaler.
T0S
/128, clk
TOSC1
clk
PSR0
CS00
CS01
CS02
AS0
OSC
T0S
/256, and clk
OSC
clk
T0S
. By setting the AS0 bit in ASSR, Timer/Counter0 is asyn-
T0S
/1024. Additionally, clk
Clear
TIMER/COUNTER0 CLOCK SOURCE
0
10-BIT T/C PRESCALER
T0S
clk
. clk
T0
T0S
T0S
as well as 0 (stop) may be
is by default connected to
T0S
/8, clk
T0S
/32, clk
2490G–AVR–03/04
T0S
/64,