ATMEga64L ATMEL Corporation, ATMEga64L Datasheet - Page 53
ATMEga64L
Manufacturer Part Number
ATMEga64L
Description
8-bit AVR Microcontroller with 64K Bytes In-System Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
1.ATMEGA64L.pdf
(363 pages)
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Watchdog Reset
MCU Control and Status
Register – MCUCSR
2490G–AVR–03/04
(1)
When the Watchdog times out, it will generate a short reset pulse of one CK cycle dura-
tion. On the falling edge of this pulse, the delay timer starts counting the Time-out period
t
Figure 27. Watchdog Reset During Operation
The MCU Control and Status Register provides information on which reset source
caused an MCU Reset.
Note:
• Bit 4 – JTRF: JTAG Reset Flag
This bit is set if a reset is being caused by a logic one in the JTAG Reset Register
selected by the JTAG instruction AVR_RESET. This bit is reset by a Brown-out Reset,
or by writing a logic zero to the flag.
• Bit 3 – WDRF: Watchdog Reset Flag
This bit is set if a Watchdog Reset occurs. The bit is reset by a Power-on Reset, or by
writing a logic zero to the flag.
• Bit 2 – BORF: Brown-out Reset Flag
This bit is set if a Brown-out Reset occurs. The bit is reset by a Power-on Reset, or by
writing a logic zero to the flag.
• Bit 1 – EXTRF: External Reset Flag
This bit is set if an External Reset occurs. The bit is reset by a Power-on Reset, or by
writing a logic zero to the flag.
TOUT
Bit
Read/Write
Initial Value
. Refer to page 54 for details on operation of the Watchdog Timer.
CC
1. Only EXTRF and PORF are available in mega103 compatibility mode.
JTD
R/W
7
0
R
6
–
0
R
5
–
0
CK
JTRF
R/W
4
WDRF
R/W
3
See Bit Description
BORF
R/W
2
ATmega64(L)
EXTRF
R/W
1
PORF
R/W
0
MCUCSR
53
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