ATMEga64L ATMEL Corporation, ATMEga64L Datasheet - Page 46
ATMEga64L
Manufacturer Part Number
ATMEga64L
Description
8-bit AVR Microcontroller with 64K Bytes In-System Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
1.ATMEGA64L.pdf
(363 pages)
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Standby Mode
Extended Standby Mode
Table 18. Active Clock Domains and Wake Up Sources in the Different Sleep Modes
Notes:
46
Sleep
Mode
Idle
ADC
Noise
Reduction
Power-
down
Power-
save
Standby
Extended
Standby
1. External Crystal or resonator selected as clock source.
2. If AS
3. Only INT3:0 or level interrupt INT7:4.
(1)
(1)
ATmega64(L)
clk
0
CPU
bit in ASSR is set.
clk
Active Clock Domains
FLASH
clk
X
IO
asynchronous timer should be considered undefined after wake-up in Power-save mode
if AS0 is 0.
This sleep mode basically halts all clocks except clk
chronous modules, including Timer/Counter0 if clocked asynchronously.
When the SM2..0 bits are 110 and an external crystal/resonator clock option is selected,
the SLEEP instruction makes the MCU enter Standby mode. This mode is identical to
Power-down with the exception that the Oscillator is kept running. From Standby mode,
the device wakes up in six clock cycles.
When the SM2..0 bits are 111 and an external crystal/resonator clock option is selected,
the SLEEP instruction makes the MCU enter Extended Standby mode. This mode is
identical to Power-save mode with the exception that the Oscillator is kept running.
From Extended Standby mode, the device wakes up in six clock cycles.
clk
X
X
ADC
clk
X
X
X
X
ASY
(2)
(2)
Enabled
Source
Clock
Main
X
X
X
X
Oscillators
Enabled
Timer
Osc
X
X
X
X
(2)
(2)
(2)
(2)
X
X
X
X
X
7:0
N
X
T
I
(3)
(3)
(3)
(3)
(3)
Address
Match
TWI
X
X
X
X
X
X
ASY
, allowing operation only of asyn-
Wake Up Sources
Timer0
X
X
X
X
(2)
(2)
EEPROM
Ready
SPM/
X
X
2490G–AVR–03/04
A
D
C
X
X
Other
I/O
X
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