ATMEga64L ATMEL Corporation, ATMEga64L Datasheet - Page 330
ATMEga64L
Manufacturer Part Number
ATMEga64L
Description
8-bit AVR Microcontroller with 64K Bytes In-System Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
1.ATMEGA64L.pdf
(363 pages)
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Figure 156. Two-wire Serial Bus Timing
330
SCL
SDA
5. This requirement applies to all ATmega64 Two-wire Serial Interface operation. Other devices connected to the Two-wire
6. The actual low period generated by the ATmega64 Two-wire Serial Interface is (1/f
7. The actual low period generated by the ATmega64 Two-wire Serial Interface is (1/f
t
ATmega64(L)
SU;STA
Serial Bus need only obey the general f
6 MHz for the low time requirement to be strictly met at f
will not be strictly met for f
at full speed (400 kHz) with other ATmega64 devices, as well as any other device with a proper t
t
HD;STA
SCL
t
t
of
LOW
> 308 kHz when f
SCL
t
HIGH
requirement.
t
HD;DAT
CK
= 8 MHz. Still, ATmega64 devices connected to the bus may communicate
SCL
t
LOW
= 100 kHz.
t
SU;DAT
SCL
SCL
- 2/f
- 2/f
CK
CK
), thus the low time requirement
), thus f
LOW
t
SU;STO
CK
acceptance margin.
t
r
must be greater than
2490G–AVR–03/04
t
BUF
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