ATMEga64L ATMEL Corporation, ATMEga64L Datasheet - Page 304
ATMEga64L
Manufacturer Part Number
ATMEga64L
Description
8-bit AVR Microcontroller with 64K Bytes In-System Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
1.ATMEGA64L.pdf
(363 pages)
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Reading the Signature Bytes
Reading the Calibration Byte
Parallel Programming
Characteristics
304
ATmega64(L)
Figure 143. Mapping Between BS1, BS2 and the Fuse and Lock Bits during Read
The algorithm for reading the Signature bytes is as follows (refer to “Programming the
Flash” for details on Command and Address loading):
1. A: Load Command “0000 1000”.
2. B: Load Address Low Byte (0x00 - 0x02).
3. Set OE to “0”, and BS1 to “0”. The selected Signature byte can now be read at
4. Set OE to “1”.
The algorithm for reading the Calibration bytes is as follows (refer to “Programming the
Flash” for details on Command and Address loading):
1. A: Load Command “0000 1000”.
2. B: Load Address Low Byte, (0x00 - 0x03).
3. Set OE to “0”, and BS1 to “1”. The Calibration byte can now be read at DATA.
4. Set OE to “1”.
Figure 144. Parallel Programming Timing, Including some General Timing
Requirements
(DATA, XA0/1, BS1, BS2)
DATA.
Data & Contol
RDY/BSY
PAGEL
XTAL1
Fuse Low Byte
Extended Fuse Byte
Lock Bits
Fuse High Byte
WR
t
t
BVPH
DVXH
BS2
BS2
t
t
XHXL
PHPL
t
t
t
t
XLDX
PLBX
XLWL
PLWL
0
1
0
1
t
BVWL
BS1
t
WL WH
WLRL
0
1
t
DATA
WLBX
2490G–AVR–03/04
t
WLRH
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