ATMEga64L ATMEL Corporation, ATMEga64L Datasheet - Page 20

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ATMEga64L

Manufacturer Part Number
ATMEga64L
Description
8-bit AVR Microcontroller with 64K Bytes In-System Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet

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EEPROM Address Register –
EEARH and EEARL
EEPROM Data Register –
EEDR
EEPROM Control Register –
EECR
20
ATmega64(L)
• Bits 15..11 – Res: Reserved Bits
These are reserved bits and will always read as zero. When writing to this address loca-
tion, write these bits to zero for compatibility with future devices.
• Bits 10..0 – EEAR10..0: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address
in the 2K bytes EEPROM space. The EEPROM data bytes are addressed linearly
between 0 and 2,048. The Initial Value of EEAR is undefined. A proper value must be
written before the EEPROM may be accessed.
• Bits 7..0 – EEDR7.0: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to
the EEPROM in the address given by the EEAR Register. For the EEPROM read oper-
ation, the EEDR contains the data read out from the EEPROM at the address given by
EEAR.
• Bits 7..4 – Res: Reserved Bits
These bits are reserved bits in the ATmega64 and will always read as zero.
• Bit 3 – EERIE: EEPROM Ready Interrupt Enable
Writing EERIE to one enables the EEPROM Ready Interrupt if the I-bit in SREG is set.
Writing EERIE to zero disables the interrupt. The EEPROM Ready Interrupt generates a
constant interrupt when EEWE is cleared.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
EEAR7
MSB
R/W
R/W
15
R
X
R
7
0
7
0
7
0
EEAR6
R/W
R/W
14
R
X
R
6
0
6
0
6
0
EEAR5
R/W
R/W
13
R
X
R
5
0
5
0
5
0
EEAR4
R/W
R/W
12
R
X
R
4
0
4
0
4
0
EEAR3
EERIE
R/W
R/W
R/W
11
R
X
3
0
3
0
3
0
EEAR10
EEMWE
EEAR2
R/W
R/W
R/W
R/W
10
2
0
X
X
2
0
2
EEAR9
EEAR1
EEWE
R/W
R/W
R/W
R/W
1
0
X
X
X
1
9
1
EEAR8
EEAR0
EERE
LSB
R/W
R/W
R/W
R/W
0
0
0
X
X
0
2490G–AVR–03/04
8
0
EEARH
EEARL
EEDR
EECR

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