ATMEga64L ATMEL Corporation, ATMEga64L Datasheet - Page 80

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ATMEga64L

Manufacturer Part Number
ATMEga64L
Description
8-bit AVR Microcontroller with 64K Bytes In-System Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet

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80
ATmega64(L)
• AIN1/OC3A – Port E, Bit 3
AIN1 – Analog Comparator Negative input. This pin is directly connected to the negative
input of the Analog Comparator.
OC3A, Output Compare Match A output: The PE3 pin can serve as an external output
for the Timer/Counter3 Output Compare A. The pin has to be configured as an output
(DDE3 set – one) to serve this function. The OC3A pin is also the output pin for the
PWM mode timer function.
• AIN0/XCK0 – Port E, Bit 2
AIN0 – Analog Comparator Positive input. This pin is directly connected to the positive
input of the Analog Comparator.
XCK0, USART0 External Clock. The Data Direction Register (DDE2) controls whether
the clock is output (DDE2 set) or input (DDE2 cleared). The XCK0 pin is active only
when the USART0 operates in synchronous mode.
• PDO/TXD0 – Port E, Bit 1
PDO, SPI Serial Programming Data output. During Serial Program Downloading, this
pin is used as data output line for the ATmega64.
TXD0, UART0 Transmit Pin.
• PDI/RXD0 – Port E, Bit 0
PDI, SPI Serial Programming Data input. During serial program downloading, this pin is
used as data input line for the ATmega64.
RXD0, USART0 Receive pin. Receive Data (Data Input pin for the USART0). When the
USART0 Receiver is enabled this pin is configured as an input regardless of the value of
DDRE0. When the USART0 forces this pin to be an input, a logical one in PORTE0 will
turn on the internal pull-up.
Table 40 and Table 41 relates the alternate functions of Port E to the overriding signals
shown in Figure 33 on page 69.
Table 40. Overriding Signals for Alternate Functions PE7..PE4
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
PE7/INT7/IC3
0
0
0
0
0
0
INT7 ENABLE
1
INT7 INPUT/IC3
INPUT
PE6/INT6/T3
0
0
0
0
0
INT6 ENABLE
1
INT7 INPUT/T3
INPUT
0
PE5/INT5/OC3C
0
0
0
0
OC3C ENABLE
OC3C
INT5 ENABLE
1
INT5 INPUT
PE4/INT4/OC3B
0
0
0
0
OC3B ENABLE
OC3B
INT4 ENABLE
1
INT4 INPUT
2490G–AVR–03/04

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