ATMEga64L ATMEL Corporation, ATMEga64L Datasheet - Page 229

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ATMEga64L

Manufacturer Part Number
ATMEga64L
Description
8-bit AVR Microcontroller with 64K Bytes In-System Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet

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Analog Comparator
Multiplexed Input
2490G–AVR–03/04
• Bits 1, 0 – ACIS1, ACIS0: Analog Comparator Interrupt Mode Select
These bits determine which comparator events that trigger the Analog Comparator inter-
rupt. The different settings are shown in Table 93.
Table 93. ACIS1/ACIS0 Settings
When changing the ACIS1/ACIS0 bits, the Analog Comparator Interrupt must be dis-
abled by clearing its Interrupt Enable bit in the ACSR Register. Otherwise an interrupt
can occur when the bits are changed.
It is possible to select any of the ADC7..0 pins to replace the negative input to the Ana-
log Comparator. The ADC multiplexer is used to select this input, and consequently, the
ADC must be switched off to utilize this feature. If the Analog Comparator Multiplexer
Enable bit (ACME in SFIOR) is set and the ADC is switched off (ADEN in ADCSRA is
zero), MUX2..0 in ADMUX select the input pin to replace the negative input to the Ana-
log Comparator, as shown in Table 94. If ACME is cleared or ADEN is set, AIN1 is
applied to the negative input to the Analog Comparator.
Table 94. Analog Comparator Multiplexed Input
ACME
ACIS1
0
1
1
1
1
1
1
1
1
1
0
0
1
1
ADEN
ACIS0
x
1
0
0
0
0
0
0
0
0
0
1
0
1
Interrupt Mode
Comparator Interrupt on Output Toggle.
Reserved
Comparator Interrupt on Falling Output Edge.
Comparator Interrupt on Rising Output Edge.
MUX2..0
000
001
010
011
100
101
110
111
xxx
xxx
Analog Comparator Negative Input
AIN1
AIN1
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
ATmega64(L)
229

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