R8A66597BG RENESAS [Renesas Technology Corp], R8A66597BG Datasheet - Page 113

• Manufacturer Part Number: R8A66597BG
• Description: ASSP (USB2.0 2 Port Host/1 Port Peripheral Controller)
• Manufacturer: RENESAS [Renesas Technology Corp]

R8A66597FP/DFP/BG
3.1.9.2 Low-Power Sleep State
3.1.9.3 VCC OFF State
R e v 1 . 0 1
When SYSCFG1 register LPSME bit is set to “1” in the controller initialization, if the clock stop process is executed
while the controller is in the normal operating state, the controller goes to the low-power sleep state. In this state,
power consumption is reduced while maintaining the value of each register. If the controller is transitioned to this state
during USB suspend, power consumption can be reduced while still maintaining the USB address, device state, and
other information.
Please refer to 3.1.10.2 and Figure 3.3 for the detailed the setup sequence to transition to the low-power sleep state.
To return from the low-power sleep state, refer to Table 2.7. The return sequence is detailed in 3.1.10.3 and Figure
3.4.
The controller automatically enables the oscillation buffer operation when it detects a recovery condition from the
low-power sleep state. At this time, the value of the XCKE bit is not changed. The user must confirm “SCKE=1” by
software and then set “XCKE=1”.
To enable the low-power sleep state, set the SYSCFG1 register LPSME bit to “1” during controller initialization.
Registers cannot be accessed during the low-power sleep state. In addition, data in the FIFO buffers will be lost during
the transition, so make a send/receive data process is executed before transitioning to the low-power sleep state.
When the Host Controller function is selected and a remote wakeup signal is received in the suspend state, the internal
clock must be supplied within 1ms of the signal detection and the resume signal output started. Therefore, do not stop
the internal clock when the controller is in the suspend state and the remote wakeup is enabled.
The VCC OFF state allows some power to be supplied to the controller but cuts off supply to the USB block. The
controller is transitioned to the VCC OFF state by keeping the VIF on while turning off the VCC and AVCC.
Unlike returning the controller from the low-power sleep state by controlling the registers with software, this state
requires the VCC and AVCC to be turned on and an H/W reset executed.
The contents of each register are lost when the VCC is turned off, and the controller goes to the initialization state after
recovery.
O c t 1 7 , 2 0 0 8
p a g e 1 1 3 o f 1 8 3