R8A66597BG RENESAS [Renesas Technology Corp], R8A66597BG Datasheet - Page 164

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R8A66597BG

Manufacturer Part Number
R8A66597BG
Description
ASSP (USB2.0 2 Port Host/1 Port Peripheral Controller)
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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R8A66597FP/DFP/BG
4.7 Power Sequence, Reset Timming
4.7.1
Note: Simultaneous Power-on and Power-off is recommended for VCC and AVCC. VIF Power-on timing is recommended to be
simultaneous with VCC and AVCC, or to be earlier than VCC and AVCC. The VIF Power-off timing is recommended to be
simultaneous with VCC and AVCC, or to be later than VCC and AVCC.
Reset with RST_N is a must. If this sequence can't keep, normal operating is not guaranteed that even with conduct the
operation of Reset timing of the chapter 4.7.2.
4.7.2
R e v 1 . 0 1
Reset timing of VCC=On status
WR0_N, WR1_N
Power Sequence
WR0_N, WR1_N
O c t 1 7 , 2 0 0 8
RST_N
RST_N
CS_N,
VCC
CS_N,
3.0V
0.3V
p a g e 1 6 4 o f 1 8 3
min.0ns
min.100ns
min.300µs
min.500ns
min.500ns

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