R8A66597BG RENESAS [Renesas Technology Corp], R8A66597BG Datasheet - Page 115

• Manufacturer Part Number: R8A66597BG
• Description: ASSP (USB2.0 2 Port Host/1 Port Peripheral Controller)
• Manufacturer: RENESAS [Renesas Technology Corp]

R8A66597FP/DFP/BG
3.1.10.3 Restart Internal Clock Supply (from low-power sleep state to normal operating state)
R e v 1 . 0 1
SCKE(H/W)
*3) Return from the low-power sleep state can be enabled by accessing the CPU if SYSCFG1 register PCSDIS bit is set to
“0”. If returning to the normal state in these conditions, INT_N is not asserted.
PLLC(H/W)
INT_N(H/W)
Event
event from low-power
XCKE
Generating return
Figure 3.4 shows a diagram for transition from the low-power sleep state to the normal operating state.
sleep state
(1) Interrupt is generated to trigger recovery from low-power sleep state, INT_N pin is asserted.
(2) Software wait for 1ms. (Do not access the controller during this time.)
(3) Software wait until “SCKE=1”. (Controller automatically starts the oscillation buffer and enables PLLC and
(4) Set ”XCKE=1” with software.
O c t 1 7 , 2 0 0 8
(or, a dummy is executed by software and the controller is returned to the normal state *3)).
Oscillation buffer is enabled but does not affect the XCKE bit.
SCKE.)
Figure 3.4 Control Timing Diagram for Returning from Low-Power Sleep State
p a g e 1 1 5 o f 1 8 3
(1)
Values read during low-power sleep state are indeterminate.
(2)
(3) (4)