R8A66597BG RENESAS [Renesas Technology Corp], R8A66597BG Datasheet - Page 148

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R8A66597BG

Manufacturer Part Number
R8A66597BG
Description
ASSP (USB2.0 2 Port Host/1 Port Peripheral Controller)
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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R8A66597FP/DFP/BG
3.8 Interrupt Transfer (Pipes 6-9)
3.8.1
3.8.1.1 Operation Outline
3.8.1.2 Counter Initialization
3.8.1.3 Operations when send/receive are invalid at token issuance timing
3.9 Isochronous Transfer (Pipes 1-2)
R e v 1 . 0 1
Interval Counter for Interrupt Transfer when Host Controller Function is Selected
When the Peripheral Controller function is selected, the controller executes an interrupt transfer in accordance with the
period managed by the Host controller. The controller ignores (no response) PING packets in interrupt transfers. In
addition, the controller does not send a NYET handshake, but responds with ACK, NAK or STALL.
When the Host Controller function is selected, the token issuance timing can be set by the interval counter. Even for
OUT direction transfers, the PING token in not issued but an OUT token is issued.Also, when a NYET handshake is
received from the Peripheral, the interrupt transfer operates as an ACK receive.
The R8A66597 controller does not support high-bandwidth transfers in the interrupt transfer mode.
When an interrupt transfer is executed, the transaction interval is set in the PIPEPERI register IITV bit. The controller
issues a token for the interrupt transfer in accordance with the set interval.
The controller initializes the interval counter under the following conditions.
Note that the interval counter will not be initialized in the following conditions.
A token will not be issued in the following conditions even at normal token issuance timing. If this kind of case occurs,
the transaction will be attempted again at the next interval.
The controller provides the following functions for isochronous transfers.
The controller does not support high-bandwidth isochronous transfers. When transmitting an isochronous pipe in a split
transaction, set a value of 188 bytes or less in the MXPS bit.
When the Host Controller Function is selected and isochronous transfers are being sent in two pipes at the same time,
make sure the operation complies with the USB 2.0 Spec Section 5.6.3 Isochronous Transfer Packet Size Constraints.
(1) H/W reset
(2) Buffer memory initialization by ACLRM
(1) USB bus reset and USB suspend
(1) When “NAK” or “STALL” is set in PID bit
(2) When there is no empty space in the buffer memory at the timing of sending a IN-direction (receive) transfer
(3) When there is no data in the buffer memory at the timing of sending an OUT-direction (send) transfer token
(1) Isochronous transfer error information notification
(2) Interval counter ( IITV bit setting)
(3) Isochronous IN transfer data setup control ( IDLY function)
(4) Isochronous IN transfer buffer flush function ( IFIS bit setting)
(5) SOF pulse output function
O c t 1 7 , 2 0 0 8
When IITV bit is initialized
This will initialize the counter but not the IITV bit. Set the ACLRM bit to “0” to start the count of the IITV set
value again.
These conditions do not initialize the IITB bit. Set the UACT bit to “1” to start the count from the value before
the USB bus reset or USB suspend status.
token
p a g e 1 4 8 o f 1 8 3

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