R8A66597BG RENESAS [Renesas Technology Corp], R8A66597BG Datasheet - Page 138
R8A66597BG
Manufacturer Part Number
R8A66597BG
Description
ASSP (USB2.0 2 Port Host/1 Port Peripheral Controller)
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.R8A66597BG.pdf
(185 pages)
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R8A66597FP/DFP/BG
3.4.2.3 Transaction Counter (read direction)
R e v 1 . 0 1
The transaction counter enables the controller to recognize transfer completion after the specified number of
transactions has completed in the data packet receive direction. The transaction counter is a function that operates in
correspondence to pipes set in the receive direction. This function can be used for read events from any FIFO port.
The transaction counter includes the TRNCNT register, which specifies the number of transactions, and the current
counter that counts the number of internal transactions. When the current counter reaches the specified number of
transactions, the buffer memory goes to the read-enabled status, even if it is not full. When the Host Controller function
is selected, not only is the buffer memory read-enabled, but tokens cannot be issued by the controller to the
corresponding pipe.
The TRCLR bit can be used to initialize the current counter in the transaction counter function so that the transaction
can counted from the beginning again. Also, the information read from the TRNCNT register can be switched by
setting the TRENB bit accordingly.
Modification conditions for the CURPIPE are as follows:
TRCLR bit usage conditions are as follows.
(1) Do not change the CURPIPE setting until the transaction in the specified pipe is completed.
(2) The CURPIPE cannot be changed unless the current counter is cleared.
(1) The current counter cannot be cleared while a transaction is in process and “PID=BUF”.
(2) The current counter cannot be cleared when data remains in the buffer.
O c t 1 7 , 2 0 0 8
TRENB=0: the set transaction counter value is read out
TRENB=1: the current counter value counted internally is read out
p a g e 1 3 8 o f 1 8 3
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