R8A66597BG RENESAS [Renesas Technology Corp], R8A66597BG Datasheet - Page 98
R8A66597BG
Manufacturer Part Number
R8A66597BG
Description
ASSP (USB2.0 2 Port Host/1 Port Peripheral Controller)
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.R8A66597BG.pdf
(185 pages)
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R8A66597FP/DFP/BG
2.17.5 Auto response mode bit (ATREPM)
2.17.6 Auto buffer clear mode bit (ACLRM)
This bit can be modified when "CSSTS=0", "PID=NAK", and when the pipe in the CURPIPE bit is not written. To modify this bit
after modifying the pipe PID bit from "BUF" to "NAK", check that "CSSTS=0" and "PBUSY=0", and then modify it. However,
when the controller has modified the PID bit to "NAK", it is not necessary to check the PBUSY bit.
R e v 1 . 0 1
No.
(1)
(2)
(3)
(4)
(5)
All contents of the FIFO buffer allocated to the pipe
(clear both sides of the FIFO buffer while settingto the
double buffer)
Interval count value, if transfer type of the pipe is
isochronous
Internal flag related to BFRE bit
FIFO buffer toggle control
Internal flag related to the transaction count
If the Peripheral Controller function is selected, when the transfer type of thepipe is written to "BULK", "1" can be
written to this bit. When "1" is written to this bit, the controller responds as shown below for the token from the USB
Host.
(1) If pipe of Bulk-IN transfer (write "TYPE=01" and "DIR=1")
(2) If pipe of Bulk-OUT transfer (set "TYPE=01" and "DIR=0")
This bit can be modified when "CSSTS=0" and "PID=NAK". To modify this bit after modifying the PID bit of the pipe
from "BUF" to "NAK", check that "CSSTS=0" and "PBUSY=0" and then modify the bit. However, when the controller
has modified the PID bit to "NAK", it is not necessary to check the PBUSY bit.
When writing "1" to this bit to execute USB communication, the FIFO buffer should be empty. While "1" is written to this
bit to execute USB communication, do not write to the FIFO buffer.
If the transfer type of the pipe is isochronous,write "0" to this bit.
When the Host Controller function is selected, write "0" to this bit.
To delete all content from the FIFO buffer allocated to the pipe, write "1" and "0" sequentially in the ACLRM bit. When
"1" and "0" are written sequentially in this bit, the contents to be cleared by the controller and the instances when the
items need to be cleared are shown in Table 2.18.
If writing "ATREPM=1" and "PID=BUF", the controller sends a zero-length packet for the token. Whenever an
acknowledgement is received from the USB Host (If there is one transaction, the token received → zero-length
packet sent → ACK received), the controller updates the sequence toggle bit (DATA-PID). BRDY and BEMP
interrupts do not occur.
If writing "ATREPM=1" and "PID=BUF", the controller sends a NAK response for the OUT-token (or PING-token)
and issues an NRDY interrupt.
O c t 1 7 , 2 0 0 8
Contents cleared by ACLRM bit operation
Table 2.18 Contents Cleared by the Controller if writing "ACLRM=1" settings
p a g e 9 8 o f 1 8 3
To reset the interval count value
When modifying the BFRE bit setup value
When modifying the DBLB bit setup value
If there is a forceful termination of transaction count function
Instances when clearing the contents is necessary
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