H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 1013
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H8S-2350
Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S-2350.pdf
(1025 pages)
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Port Name
Pin Name
PG
Legend:
H
L
T
kept
DDR
OPE
WAITE
BRLE
BREQOE : BREQO pin enable
DRAME
LCASE
Note:
0
/CAS
* Indicates the state after completion of the executing bus cycle.
: High level
: Low level
: High impedance
: Input port becomes high-impedance, output port retains state
: Data direction register
: Output port enable
: Wait input enable
: Bus release enable
: DRAM space setting
: DRAM space setting, CW2 = LCASS = 0
MCU
Operating
Mode
1 to 3, 7
4 to 6
Power-
On
Reset
T
T
Manual
Reset
kept
[DRAME = 0]
kept
[DRAME = 1]
H *
Hardware
Standby
Mode
T
T
Rev. 3.00 Sep 15, 2006 page 979 of 988
Software
Standby
Mode
kept
[DRAME = 0]
kept
[OPE = 0]
T
[DRAME ·
OPE = 1]
CAS
Bus
Release
State
kept
T
Appendix D Pin States
REJ09B0330-0300
Program
Execution
State
Sleep Mode
I/O port
[DRAME =
0]
Input port
[DRAME =
1]
CAS
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